Various semiconductors, vacuums, and other apparatus and devices are used to form voltage pulses, which have a signal propagation delay depending on the temperature and other external conditions, wherein delay stabilization systems are used for compensation of this dependency.
One known delay stabilization system includes an adjustable delay unit and a flip-flop whose input is coupled with the input device as disclosed in French Patent FR No. 2,140,713, H03K 5/135, G01S 13/78, 1973. The system includes an adjustable delay unit, a second conversion unit, whose output is connected to the output of the device and to the first flip-flop input, wherein the second input of is coupled to the input of the first conversion unit and to the input of the device. The output of above mentioned flip-flop is connected to the first input of a differentiating unit and the first input of the time counter, wherein the output is connected to the second input of the differentiating unit, whose output is connected to the control input of the adjustable delay unit.
The system stabilizes delay of input pulses in conversion units by changing an adjustable delay, which occurs under the control of output voltage from the differentiating unit. However, the accuracy of delay stabilization is not high.
This is because the time interval formed by the counter has a thermal instability due to the crystal oscillator that is included in the system. The non-synchronism of input pulses with respect to the crystal oscillator pulses is equal to the period of crystal oscillator, and becomes fully included in the error of the stabilized delay.
Another known delay stabilization system includes a serially connected conversion unit, an adjustable delay unit, a flip-flop, whose input is connected to the input of a conversion unit and the input device, as disclosed in Patent SU No. 957,422, H03K 5/153, 1982. A disadvantage of the known device is also low delay stabilization accuracy due to the presence of the crystal oscillator in the system.
Still another related prior art reference teaches a delay stabilization system including an input channel, and connected in series: a pulse edge detector with two inputs, a filter, a variable delay unit, and a feedback channel from the generator to one of the inputs of the pulse edge detector, as disclosed in U.S. Pat. No. 4,338,569, H03K 5/153, 1982. The system includes an input device for receiving an input pulse sequence and a device connected to said first input device to provide a fixed time delay in transmitting a sequence of pulses. The system also includes a pulse edge detector having first and second input channels for receiving the signal output from the device to provide a fixed delay time, which generates an output signal corresponding to the time interval between the pulse on the input channel and other input signal on the second input channel.
The system also includes a feedback device for generating a feedback signal from the output voltage of pulse edge detector device to provide input to the variable delay device to control the time delay of the output signal. The system also includes a device connecting the delayed output of the variable delay device with the second input channel of the said pulse edge detector device.
A disadvantage of this system is a dependence of the stabilized delay on the pulse repetition frequency f, because the detector inputs receive pulses delayed relative to each other by an amount equal to the sum of the variable delay time tvar and twice the time of the unstable operating system delay 2tunstab.
The system adjusts the variable delay time tvar so that the pulses on the detector input are delayed relative to each other for a time equal to the repetition period of the input pulse sequence, i.e. tvar+2tunstab=T=1/f. Consequently, changing the pulse repetition frequency f also changes the stabilization delay tstab=tvar+tunstab.